1. Field of the Invention
The present invention relates to the protection of telecommunication apparatus, such as ADMs, DXCs, multiservice apparatus, metro apparatus or the like. In particular, the present invention relates to a device and method for reducing the switching time of section/line and equipment protections in such apparatus.
Whilst the present invention is applicable to Synchronous Digital Hierarchy (SDH), Synchronous Optical Networking (SONET) and Optical Transport Networks (OTN), it will be described, just for clarity reasons, mainly with reference to SDH/SONET Standards.
This application is based on, and claims the benefit of, European Patent Application No. 04290901.0 filed on Apr. 5, 2004, which is incorporated by reference herein.
2. Description of the Prior Art
As it is known, a network element, for instance an ADM (Add/Drop Multiplexer) or a DXC (Digital Cross Connect) comprises one or more input/output ports, backpanel connections and one or more switching matrices. The ports receive input flows in the form of frames.
Configurations are known in which many Section/Line and Path functions are carried out at the ports instead of at the matrices. This is convenient because it results in lower complexity at the matrices.
The problem is provisioning the ports with the proper parameters and information for protection purposes. In fact, as far as protection is concerned, typically there are a number of working resources and one or more spare resources. Each of the working resources is configured in a certain way with certain parameters. The spare resources are either properly configured (for extra traffic) or are free of any configuration, namely are ready to be configured according to the working resource to be replaced.
For instance, in a SDH/SONET MSP 3:1 configuration, three working and one spare line resources are available. The single spare resource, when the network is in the idle state, may carry extra traffic and is configured independently from the other three working resources. Also each of the working resources is configured in a way that is independent from the others. When a fail occurs in one of the three working resources, if necessary the extra traffic is squelched by inserting AIS and the spare resource is utilized for transporting the high priority traffic of the failed working resource. Thus, at that time, the spare resource should be properly configured correspondingly to the failed working resource that is replaced. It may happen that the spare resource is completely differently configured from the working one and this results in a high number of registers to be software updated in a very short time. The registers, of the order of thousands (e.g. when they are at Path level for an OC-768), have to be updated in a very short time in order to comply with the Standard requirements. The differences between two configurations could be for instance in terms of AU concatenation level, monitoring settings (e.g. Trace Identifiers) and others.
With the above in mind, a first technical problem is related to the need to improve switching time capabilities in case of Section/Line protections in SDH, SONET and OTN applications. The target is to significantly increase the reliability of a transmission network reducing switching time. In other words, the technical problem is to define a method and device to boost-up the reconfiguration of Section/Line, and Path blocks and corresponding parameters as they are defined in the relevant standards.
It is also known that there are provided apparatus boards carrying out functionalities that originate and terminate at the matrices of an apparatus. Such a functionality could be, for instance, an Higher Order vs Lower Order Adaptation functionality. Also in that case, one or more spare resources are provided for protecting a number of working resources. Generally, when the apparatus is in the idle state, the spare resources are in stand-by, ready to replace a working resource when a fail occur. So, when the spare resource is activated, it should be configured according to the working resource which is replacing (it is not known in advance which of the working resource will become failed). The new configuration is presently software made and takes a time which is significantly affecting the overall reliability of the transmission network. So, also for apparatus protections, there is the need to reduce the switching times.
The problem of re-arrangements caused by network protection switching has been already addressed and two are the main solutions that are known to the Applicant.
The first solution (as mentioned above) is simply based on dynamic processing and reconfiguration of all the parameters involved in Section/Line, and Path blocks. This reconfiguration, independently from any architectural approach, requires long time due to its complexity. This finally increases the overall switching time. The first solution requires the reconfiguration of all Section/Line, and Path blocks during the protection action. Since these actions are traffic affecting, the longer this phase the longer the switching time and the lower the network reliability. Furthermore, the first solution would even not be able to match switching time requirements for STM-256 or STS-192 due to the increasing number of parameters to be reconfigured during the switch.
The second solution (which avoids re-arrangements) consists in implementing a “centralized” architecture identical to what is described in ITU-T G-783. This second solution is not scalable because when the equipments manage a large number of Path tributaries, the matrix board becomes more and more complex. Current levels of integration at equipment level are not reachable with this solution. Furthermore, the second solution is highly expensive and space/power consuming when implemented with the ASIC devices according to the status of the art.
The above and further problems are solved by a device and method according to claims 1 and 9, respectively. Further advantageous features are set forth in the respective dependent claims. All the claims are deemed to be an integral part of the present description.